This invention relates to a method of issuing a request to a memory buffer control unit.
A data processing system usually comprises a main memory unit (MEM), a central processing unit (CPU), and a system interface unit (SIU) connected between the main memory unit and the central processing unit. The central processing unit comprises a memory buffer control unit (MBU), a prefetch control unit (PFU), and an instruction execution control unit (EXU) which are connected to one another. The prefetch control unit is called an advanced control unit. The central processing unit may be operable under pipeline control. The instruction execution control unit includes a work storage and firmware (FW) or a microprogram control unit which includes a control storage. The memory buffer control unit includes a translation lookaside buffer (TLB). The prefetch control unit includes base registers, general registers, and an address adder for producing an effective address by using an address syllable included in an instruction. The instruction may be one of software (SW) instructions and hardware control software (HCSW) support instructions which will become clear as the description proceeds.
In the data processing system of the type described, a part of the functions of hardware/firmware (HW/FW) has been carried out by the hardware control software in order to reduce the required capacity of the control storage and to facilitate design of the firmware. The hardware control software comprises the SW instructions available to usual software and the HCSW support instructions for exclusive use in the HCSW. Both of the SW instructions and the HCSW support instructions are stored in the main memory unit.
The central processing unit is operable in either an SW mode or an HCSW mode. In the SW mode, the usual software controls an instruction counter, the base registers, the general registers and so on, and the central processing unit operates under the control of the usual software. In the HCSW mode, the hardware control software controls the instruction counter, the base registers, the general registers and so on, and the central processing unit operates under the control of the hardware control software.
In order to obtain an access to the memory buffer control unit, an access request is issued to the memory buffer control unit. The request comprises a request code and a memory address. The memory address may be either the effective address or address path information which are known in the art. Access for the memory buffer control unit (MBU access) can not always be carried out by means of the SW instructions. This is because the SW instructions are composed only of store instructions and load instructions related to access for the memory buffer control unit. An access will be called a specific access when the access cannot be carried out by means of the SW instructions. Otherwise, an access will be referred to as a usual access. The specific access must be carried out by means of the HCSW support instructions.
The specific access has conventionally been made as follows. Such a specific access method will be called a conventional specific access method. At first, a peculiar or particular start address of the control storage for use in the specific access is indicated by an MBU specific access instruction which is one of the HCSW support instruction for the specific access. The firmware starts from the peculiar start address to carry out the specific access. The firmware will be called peculiar firmware when the firmware starts from the peculiar start address. Therefore, the conventional specific access method is disadvantageous in that it takes useless time which is necessary for the peculiar firmware to carry out the specific access if the central processing unit is operable under pipeline control. In addition, the peculiar firmware is necessary to each specific access. Furthermore, it is impossible to effectively utilize the software instructions.